Mac
Steve Jobs, Steve Wozniak, and Ronald Wayne founded Apple on April 1, 1976. Wozniak designed the Apple I — a bare circuit board sold as a kit — and the follow-up Apple II, which shipped in 1977 with color graphics and a real keyboard, becoming one of the first mass-market personal computers.
Jobs understood something most engineers didn't: that design and experience were as important as the technology itself. He insisted on tight hardware-software integration and controlled the entire user experience from box to boot screen.
The original Macintosh launched on January 24, 1984 with Ridley Scott's iconic "1984" Super Bowl ad. It introduced the graphical user interface and mouse to mass-market computing — concepts borrowed from Xerox PARC and refined into something genuinely usable.
Jobs was ousted from Apple in 1985. During his 12-year exile he founded NeXT, whose OS — a Mach/BSD hybrid — would eventually become the foundation of macOS and every modern Apple platform.
In 1997 Apple acquired NeXT for $429 million, bringing Jobs back as "interim CEO." He immediately killed 70% of Apple's product line, focused the company on four quadrants (desktop/portable × consumer/pro), and hired Jonathan Ive to drive industrial design.
The iMac G3 in 1998 proved design could drive sales. The iPod (2001) and iTunes Store (2003) redefined music. The iPhone (2007) redefined the phone. The iPad (2010) created an entirely new category. Each product shared Apple's core philosophy: hardware, software, and services designed as one inseparable whole.
macOS's lineage runs through NeXTSTEP, the OS Jobs built at NeXT from 1985–1997. NeXTSTEP ran on Mach 2.5 with a 4.3BSD userland, delivered an Objective-C application framework (AppKit), and was the first commercial OS to ship Display PostScript for resolution-independent rendering.
When Apple acquired NeXT in 1997, NeXTSTEP became Rhapsody, then Mac OS X 10.0 (Cheetah) in 2001. The Cocoa frameworks the Mac developer community uses today are the NeXT frameworks with decades of additions on top.
macOS has held the official UNIX® certification from The Open Group since Mac OS X 10.5 Leopard (2007). This means full POSIX conformance — every POSIX system call, standard library, and shell utility works exactly as specified.
For developers, this means: every Linux command-line tool compiles natively, Docker runs transparently, Python/Ruby/Node behave identically to Linux servers, and SSH/rsync/grep work exactly as expected. macOS is a first-class development platform for server-side code.
Mach was developed at Carnegie Mellon University from 1984 to 1994 by Richard Rashid and his team. The goal: build a microkernel that could replace the monolithic UNIX kernel while maintaining POSIX compatibility — all kernel services (file systems, networking, device drivers) would run as user-space servers communicating via message passing.
The CMU Mach 2.5 kernel, with its elegant IPC model, became the foundation NeXT chose for NeXTSTEP in 1989. When Jobs returned to Apple, Mach came with him.
macOS's kernel is named XNU — "X is Not Unix." It's a pragmatic hybrid: the Mach microkernel provides the lowest-level abstractions (threads, virtual memory, IPC, task isolation), while the BSD subsystem (FreeBSD-derived) runs in the same kernel address space for POSIX syscalls.
The I/O Kit (device driver framework) and KEXT (kernel extensions, now replaced by DriverKit) layer on top. By running BSD in-kernel rather than as a user-space server, Apple gets Mach's clean abstractions without microkernel performance penalties.
VFS · networking · POSIX APIs · process model
IPC · VM · scheduler · tasks & threads
The fundamental Mach primitive is the message. All inter-process and inter-component communication flows through typed messages sent to ports. A port is essentially a protected message queue — a capability that must be explicitly given to a task to use.
Unlike UNIX pipes (byte streams), Mach messages are structured: they carry typed data, port rights (capabilities), and out-of-line memory descriptors. The kernel validates every message, enforcing that a task can only communicate with ports it legitimately holds rights to.
This capability model is why macOS sandboxing is so robust — an app running in a sandbox holds only the port rights the OS granted it at launch. It literally cannot communicate with services it wasn't given access to.
Mach defines two execution abstractions. A task is a resource container — it holds virtual memory space, port rights, and threads. UNIX processes map 1:1 to Mach tasks; iOS apps are tasks. A thread is a unit of CPU execution within a task.
Mach's thread scheduler is priority-based and preemptive. The scheduler distinguishes timesharing threads (normal apps), fixed priority threads (real-time audio), and importance donation (priority inheritance when a high-priority thread blocks on a lower-priority mutex). This is why audio in macOS almost never glitches even under load.
sender
capability
typed message
validates & routes
queue
receiver
Mach's virtual memory system is one of its most influential designs. The Mach VM introduced the concept of VM objects — abstract memory backing stores that can be files, anonymous memory, or shared regions. Multiple address spaces can map the same VM object with copy-on-write semantics.
This is how macOS achieves near-instant fork() — the child process shares the parent's entire address space as copy-on-write pages. Pages are only physically duplicated when either process writes to them. Every dyld shared cache (the pre-linked system library image) works via Mach VM shared mappings across all processes.
The Mach VM also implements memory pressure notifications — apps receive a signal before the system runs out of memory, allowing graceful cleanup rather than abrupt termination.
Mach ports are the OS's capability system. Each port right is a specific permission: SEND (can send messages), RECEIVE (can dequeue messages), or SEND_ONCE (can send exactly one message, then the right is destroyed).
The Bootstrap Server (now launchd) holds the port rights for every system service. When an app calls NSDistributedNotificationCenter, opens a file via XPC, or connects to the network extension, it's performing Mach IPC under the hood — requesting port rights from launchd, then messaging the service directly.
XPC (introduced in macOS 10.7) is Apple's high-level wrapper around Mach IPC + GCD, providing structured services with automatic capability handoff and crash isolation.
Intel's x86 architecture dates to 1978. Decades of backward-compatibility requirements mean x86 CPUs spend silicon area and power budget on instruction decoding, legacy mode support, and microcode. ARM64 (AArch64) is a clean RISC ISA with a fixed 32-bit instruction width and a register-rich design that compiles elegantly from C/Swift/Rust.
Apple had been designing ARM chips since the A4 in 2010 (iPhone 4). By 2020 the A14 Bionic in iPad Air was already faster than most Intel laptops. The M1 was essentially an A14X scaled up for sustained performance, and the x86 world was caught completely flat-footed.
Traditional computers have separate memory pools: CPU RAM and GPU VRAM. Copying data between them (e.g., uploading a texture) consumes time and power. Apple Silicon eliminates this with Unified Memory Architecture (UMA) — CPU, GPU, Neural Engine, and all accelerators share a single on-package memory pool with a single memory controller.
A video frame decoded by the media engine, processed by the GPU, and analyzed by Core ML's Neural Engine never crosses a PCIe bus. It stays in the same memory, accessed at full bandwidth by each engine in turn. This is the architectural reason Apple's video and ML performance devastates discrete-GPU systems watt-for-watt.
Up to 546 GB/s (M4 Max) · Single coherent address space
The M4 delivers more single-core performance than Intel's i7 at less than half the power. This gap exists because of the architecture: ARM64's RISC ISA is inherently more efficient to decode, Apple's out-of-order window (600+ instructions) is larger than any x86 CPU, and the Unified Memory means zero PCIe overhead for GPU workloads.
The efficiency cores (E-cores) on Apple Silicon run at ~0.5W each — handling background tasks, notifications, and light UI work while the performance cores (P-cores) sleep. On Intel/AMD laptops, background tasks still wake the power-hungry P-cores. This architectural efficiency explains the 2× battery-life difference in real-world use.
The original Mac used Motorola's 68000 — a clean 32-bit CISC processor running at 8 MHz. Every Mac from 1984 to 1994 ran on 68k silicon: the 68020 arrived in the Mac II (1987), the 68030 in the IIx, and the 68040 in the Quadra line.
These machines established the Mac product vocabulary: all-in-ones, towers, portables, and eventually the PowerBook — the laptop that defined what a laptop should look like, copied by every PC maker for a decade.
Apple, IBM, and Motorola formed the AIM alliance to build a RISC alternative to Intel. The Power Mac 6100 (1994) launched the transition. PowerPC chips were faster per clock and ran cooler — the PowerBook G4 Titanium (2001) was the thinnest laptop in the world at 1 inch thick.
The G3 and G4 powered the "candy-colored" iMac era. The G5 (2003) was so power-hungry it required liquid cooling — and Apple quietly decided Intel was the future.
Jobs shocked the world in June 2005: "we've been leading a secret double life" — every version of Mac OS X had been compiled for Intel since 2000. The first Intel Macs shipped in January 2006, two years ahead of schedule. Rosetta translated PowerPC apps transparently.
This era gave us the unibody MacBook Pro, the razor-thin MacBook Air (2008, Steve Jobs pulled from an envelope), the trash-can Mac Pro, and the butterfly keyboard — one of Apple's most criticized design decisions.
The M1 MacBook Air (November 2020) delivered desktop-class performance with zero fan noise and 18-hour battery life. Rosetta 2 ran Intel binaries at near-native speed. The two-year transition Intel → Apple Silicon was completed in June 2022 with the M2 MacBook Air.
M1 → M2 → M3 → M4: each generation brings ~15–25% CPU gains and dramatic Neural Engine improvements. The M4 Max (2024) has 16 performance cores, 40 GPU cores, and 120 GB unified memory — a workstation on a 3nm chip.
Why: Motorola 68k had hit its scaling ceiling. RISC promised more performance per watt and better superscalar execution.
Bridge: "Fat binaries" contained both 68k and PPC code. 68k emulation ran legacy apps. Transition completed in ~2 years.
Result: 2–3× performance gains. The PowerBook G3 (1997) became the first laptop engineers actually wanted.
Why: IBM's G5 couldn't scale past 3 GHz without liquid cooling. Intel's mobile roadmap offered far better perf/watt.
Bridge: Universal Binary (fat binaries for PPC + Intel x86). Rosetta translated PPC apps dynamically. Transition done in 12 months — 2 years early.
Result: MacBook Pro era. The unibody laptop and MacBook Air categories that dominated the next 14 years.
Why: Intel's 10nm node slipped for years. Apple's A-series chips (iPhone/iPad) had already surpassed Intel in perf/watt by 2018. Custom silicon lets Apple co-design the OS scheduler, memory subsystem, and display pipeline.
Bridge: Rosetta 2 — an AOT (ahead-of-time) x86→ARM64 translator. Runs Intel apps at ~80% native speed. Universal 2 binaries serve both. Transition completed in 2 years.
Result: M1 MacBook Air outperformed Intel MacBook Pro while fanless and at half the power draw.
M4 is on TSMC's 3nm N3E process. TSMC's 2nm (N2) process is expected in 2025 — Apple will be a launch customer. The M5 family likely arrives 2025–2026.
Apple is reportedly developing its own Wi-Fi/Bluetooth chip and a custom display controller. The vision: a Mac where every significant chip — from the T2 security coprocessor to the M-series AP to the display timing controller — is Apple-designed silicon.